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INTEGRATED CIRCUITS
DATA SHEET
CGY2030M DECT 500 mW power amplifier
Product specification Supersedes data of 1996 Jul 12 File under Integrated Circuits, IC17 1997 Jan 17
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
FEATURES * Power Amplifier (PA) overall efficiency 40% * 27 dB gain * 0 dBm input power * Operation possible without negative supply * Wide operating temperature range -30 to +85 C * SSOP16 package. APPLICATIONS * 1.88 to 1.9 GHz transceivers for DECT applications * 2 GHz transceivers (PHS, DCS). QUICK REFERENCE DATA SYMBOL VDD IDD Po Tamb Note 1. For conditions, see Chapters "AC characteristics" and "DC characteristics". ORDERING INFORMATION PACKAGE TYPE NUMBER NAME CGY2030M BLOCK DIAGRAM SSOP16 DESCRIPTION plastic shrink small outline package; 16 leads; body width 4.4 mm PARAMETER (1) positive supply voltage positive peak supply current output power operating ambient temperature - - - -30 MIN. TYP. 3.2 400 27 - - - - GENERAL DESCRIPTION
CGY2030M
The CGY2030M is a GaAs Monolithic Microwave Integrated Circuit (MMIC) power amplifier specifically designed to operate at 3.6 V battery supply. When power control is not required, it can be operated without negative supply voltage.
MAX. V
UNIT mA dBm C
+85
VERSION SOT369-1
handbook, full pagewidth
VDD1 8
VDD2 5
VDD3 13
CGY2030M
RFI 9 16 RFO/VDD4
2, 3, 4, 6, 7, 11, 12, 14, 15
10 VGG1
1 VGG2
MBG631
Fig.1 Block diagram.
1997 Jan 17
2
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
PINNING SYMBOL VGG2 GND VDD2 GND VDD1 RFI VGG1 GND VDD3 GND RFO/VDD4 PIN 1 2 to 4 5 6 and 7 8 9 10 DESCRIPTION fourth stage negative gate supply voltage ground second stage supply voltage ground first stage supply voltage PA input first second and third stages negative gate supply voltage third stage supply voltage PA output and fourth stage supply voltage MODE 1
handbook, halfpage
CGY2030M
VGG2 GND GND GND VDD2 GND GND VDD1
1 2 3 4
16 RFO/VDD4 15 GND 14 GND 13 VDD3 12 GND 11 GND 10 VGG1 9
MBG630
CGY2030M
5 6 7 8
11 and 12 ground 13 16 14 and 15 ground
RFI
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION Amplifier The CGY2030M is a 4-stage GaAs MESFET power amplifier capable of delivering 500 mW (typ.) at 1.9 GHz into a 50 load. Each amplifier stage has an open-drain configuration. The drains have to be loaded externally by adequate reactive circuits which must also provide a DC path to the supply. The amplifier can be switched off by means of an external PNP series switch connected between the battery and the amplifier drains. This switch can also be used to vary the actual supply voltage applied to the amplifier and hence, control the output power. This device is specifically designed to work with a maximum duty factor of 25%. Biasing Two modes of operation are possible: * Mode 1 * Mode 2.
In the first mode, the pins VGG1 and VGG2 are simply connected together to the ground via resistors (10 k in the evaluation board; see Fig.4). The amplifier biases itself internally to a negative voltage by action of the incoming RF signal. In this mode, power control cannot be achieved by varying the amplifier supply voltage; therefore it is suitable only for applications where power control is not required such as DECT. MODE 2 If a negative bias is available, a second mode of operation is possible, in which the amplifier is biased by providing adequate negative voltages at pins VGG1 and VGG2. In this mode, the amplifier internal bias does not depend on the incoming RF level, nor on the drain voltage, so that power control is possible by variation of the supply voltage.
1997 Jan 17
3
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VDD - VGG Tj(max) Ptot Tstg PARAMETER operating supply voltage voltage difference between supply voltage and gate bias voltage maximum operating junction temperature total power dissipation IC storage temperature no input signal CONDITIONS - - - - -55 MIN. - - - - - TYP.
CGY2030M
MAX. 5.2 8 150 400 +125
UNIT V V C mW C
THERMAL CHARACTERISTICS SYMBOL Rth j-a HANDLING Do not operate or store near strong electrostatic fields. Meets class 1 ESD test requirements [Human Body Model (HBM)], in accordance with "MIL STD 883C - method 3015". DC CHARACTERISTICS VDD = 3.2 V; Tamb = 25 C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT PARAMETER thermal resistance from junction to ambient in free air VALUE 145 UNIT K/W
Pins RFO/VDD4, VDD3, VDD2 and VDD1 VDD IDD positive supply voltage positive peak supply current 2.6 - - - -1 3.2 400 -1.2 -2.0 - 4.2 500 - - +1 V mA
Pins VGG1 and VGG2; in mode 2 VGG1 VGG2 IGG(tot) Notes 1. Negative voltages VGG1 and VGG2 must be applied before supply voltage VDD. 2. Due to non linear effects at high power levels, the gate current can be either negative or positive. bias voltage for input stages bias voltage for output stage total gate peak current note 1 note 1 note 2 V V mA
1997 Jan 17
4
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
CGY2030M
AC CHARACTERISTICS VDD = 3.2 V; fRF = 1900 MHz; Pi = 0 dBm; Tamb = 25 C; duty factor = 25%; 50 impedance system; measured and guaranteed on CGY2030M evaluation board (see Fig.4). SYMBOL Pi fRF input power duty factor operating frequency PARAMETER CONDITIONS note 1 - - MIN. -3 - - 1900 TYP. MAX. +5 25 - UNIT dBm % MHz
Measured in mode 1; without negative biasing; VGG1 and VGG2 connected to ground Po Pleak H2, H3 Stab output power efficiency RF leakage to output in power off state second and third harmonics level stability (spurious levels) note 2 VDD = 0 V 26 - - - - 27 40 -40 -35 -60 28.5 - - - - dBm % dBm dBc dBc
Measured in mode 2; with negative biasing at pins VGG1 and VGG2 Po Pleak Notes 1. Self biasing guaranteed in mode 1 at minimum input power (-3 dBm) and minimum supply voltage VDD (2.6 V). 2. The device is adjusted to provide nominal value of load power into a 50 load. The device is switched off and a 6 : 1 load replaces the 50 load. The device is switched on and the phase of the 6 : 1 load is varied 360 electrical degrees during a 60 seconds test period. output power efficiency RF leakage to output in power off state VDD = 0 V 25.5 - - 26.5 35 -50 28 - - dBm % dBm
handbook, halfpage
32
MGG165
650 IDD (mA)
Po (dBm) 28 Po
550
24 IDD
450
20 2 3 4 VDD (V) 5
350
Fig.3 Typical power and current characteristics in mode 1.
1997 Jan 17
5
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
APPLICATION INFORMATION The CGY2030M is operated and tested in accordance with the circuit diagram shown in Fig.4. Supply voltage switching is achieved by two bipolar PNP transistors. One transistor switches the first and second stages and the other switches the third and fourth stages.
CGY2030M
By switching on the last amplifier stages with some delay compared to the first stages, it is possible to get the last stages already self-biased before their supply voltage has reached its steady state value. This enables smooth power up-ramping without any power overshoot. A simpler drain switching circuit can be used if the amplifier is operated with negative biasing of the pins VGG1 and VGG2.
handbook, full pagewidth
Vbat 3.3 10 nF 68 pF 100 F
DTC11YE BC858 10 pF 330 22 pF 6.8 pF TRL1(1) TRL2(2) VGG2 10 k 1 ramp
VDD1 GND 8 7 6
GND 5
VDD2 GND 4 3
GND 2
GND 1
VGG2
CGY2030M
9 RFI Zc = 50 PA input TRL4(4) 10 k 1.8 pF VGG1 100 TRL3(3) 10 pF 1.5 pF 10 11 12 GND 13 14 15 GND 16 RFO/ VDD4 Zc = 50 PA output TRL5(5)
VGG1 GND
VDD3 GND
BC807 100 nF 6.8 pF
MGG166
Thickness: 0.8 mm; substrate: FR4; r = 4.7. (1) TRL1: width = 500 m; length = 11200 m. (2) TRL2: width = 500 m; length = 7770 m. (3) TRL3: width = 300 m; length = 15450 m. (4) TRL4: width = 1600 m; length = 12000 m. (5) TRL5: width = 1600 m; length = 11000 m.
Fig.4 Evaluation board schematic.
1997 Jan 17
6
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
PACKAGE OUTLINE SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm
CGY2030M
SOT369-1
D
E
A X
c y HE vM A
Z
16
9
Q A2 pin 1 index A1 (A 3) Lp L A
1
e bp
8
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.15 0.00 A2 1.4 1.2 A3 0.25 bp 0.32 0.20 c 0.25 0.13 D (1) 5.30 5.10 E (1) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.45 Q 0.65 0.45 v 0.2 w 0.13 y 0.1 Z (1) 0.48 0.18 10 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT369-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 94-04-20 95-02-04
1997 Jan 17
7
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
CGY2030M
If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1997 Jan 17
8
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
CGY2030M
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Jan 17
9
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
NOTES
CGY2030M
1997 Jan 17
10
Philips Semiconductors
Product specification
DECT 500 mW power amplifier
NOTES
CGY2030M
1997 Jan 17
11
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
437027/1200/03/pp12
Date of release: 1997 Jan 17
Document order number:
9397 750 01565

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